Design of synchronous digital systems: timing diagrams, propagation delay, latches and flip- flops, shift registers and counters, Mealy/Moore finite state machines, Verilog, 2-phase clocking, timing analysis, CMOS implementation, S-RAM, RAM-based designs, ASM charts, state minimization.
5
UnitsLetter
Grading1, 2, 3
PasstimeUndergraduate students only
Level LimitEngineering
College