Design of synchronous digital systems: timing diagrams, propagation delay, latches and flip- flops, shift registers and counters, Mealy/Moore finite state machines, Verilog, 2-phase clocking, timing analysis, CMOS implementation, S-RAM, RAM-based designs, ASM charts, state minimization.
Prerequisites: ECE 15A and ECE 2A or ECE 10A & ECE 10AL with a minimum grade of C- in each course; or Computer Science 30 or 64 with a minimum grade of C- in each course; open to electrical engineering, computer engineering, and computer science majors only.