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Digital Design Principles . ECE 152A
Design of synchronous digital systems: timing diagrams, propagation delay, latches and flip- flops, shift registers and counters, Mealy/Moore finite state machines, Verilog, 2-phase clocking, timing analysis, CMOS implementation, S-RAM, RAM-based designs, ASM charts, state minimization.
Prerequisites: ECE 15A and ECE 2A or ECE 10A & ECE 10AL with a minimum grade of C- in each course; or Computer Science 30 or 64 with a minimum grade of C- in each course; open to electrical engineering, computer engineering, and computer science majors only.
Undergraduate students only
Level Limit
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ECE 252B
ECE 153B
ECE 152B
ECE 122A
ECE 154A
ECE 157A
These majors only
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Spring 2024 . Li P
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15:30 PM - 16:45 PM
Spring 2025 . Li P
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15:30 PM - 16:45 PM
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ECE 152A
Li P
Spring 2025
Total: 76
ECE 152A
Li P
Spring 2024
Total: 95
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ECE 152A
0 / 145
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Digital Design Principles
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